Scalable and low-power reversible logic for future devices: QCA and IBM-based gate realization

Erişim
info:eu-repo/semantics/closedAccessTarih
2025Yazar
Ahmadpour, Seyed-SajadNavimipour, Nima Jafari
Zohaib, Muhammad
Misra, Neeraj Kumar
Pour, Mahsa Rastegar
Rasmi, Hadi
Kassa, Sankit
Das, Jadav Chandra
Üst veri
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Ahmadpour, S.-S., Navimipour, N. J., Zohaib, M., Misra, N. K., Pour, M. R., Rasmi, H., … Chandra Das, J. (2025). Scalable and low-power reversible logic for future devices: QCA and IBM-based gate realization. Sustainable Computing: Informatics and Systems, 48, 101182. https://doi.org/10.1016/j.suscom.2025.101182Özet
One such revolutionary approach to changing the nano-electronic landscape is integrating reversible logic with quantum dot technology that will replace the conventional complementary metal-oxide semiconductors (CMOS) circuits for ultra-high speed, low density, and energy-efficient digital designs. The implementation of the reversible structure under the most inflexible conditions, as executed by quantum laws, is a highly challenging task. Furthermore, the enormous occupying areas seriously compromise the accuracy of the output in quantum dot circuits. Because of this challenge, quantum circuits can be employed as fundamental building blocks in highperformance digital systems since their implementation has a key impact on overall system performance. This study discusses a paradigm shift in nanoscale digital design by using a 4 x 4 reversible gate that redefines the basis of efficiency and precision. This reversible gate is elaborately used in a reversible full-adder circuit, fully symbolizing the core of minimum area, ultra-low energy consumption, and perfect output accuracy. The proposed reversible circuits have been fully realized using quantum-dot cellular automata technology (QCA), simulated, and verified by the highly reliable tool such as Qiskit IBM and QCADesigner 2.0.3. Furthermore, simulations results demonstrated the superiority of the QCA-based proposed adder, which reduced occupied area by 7.14 %, and cell count by 11.57 %, respectively. This work resolves some problems and opens new boundaries toward the future of digital circuits by addressing the main challenges of stability and pushing the boundaries of reversible logic design.